Vertical Scan Rate Conversion for Computer Display Systems

Vertical Scan Rate Conversion for Computer Display Systems

      Disclosed is a method for expanding or compressing video output
in the vertical direction to accommodate a variety of display
formats.  Using this method, an artificial scan line is generated as
a weighted average of two adjacent real scan lines.  For example, an
ordinary television signal, with 240 active lines per field, can be
displayed on a computer display with 350 to 768 active lines per
field.

      With this method, a new image is produced, containing scan
lines derived from a stored image, without the need to match input
scan rates, without a need to repeat any given line to expand
vertical field size.  Certain aspects of this method are similar to
the older principles of operation of a scan conversion tube, in which
an image painted on a storage medium, such as a phosphor or grid, is
re-imaged by a scanning device [1].

      A variable gain amplifier can be constructed by placing a
digital to analog convertor in the input line of an amplifier, with
two additional resistors connected in a T-configuration in the
feedback loop of the amplifier.  An analog input signal is fed
through the digital to analog converter, which provides a variable
attenuating resistance in accordance with a digital input [2].

      Referring to the Figure, a control section 1 receives basic
commands, such as line expansion ration data, from the system
processor (not shown), and translates these commands into a list of
values, which is placed in weight table 2, representing the desired
percentage weighting of each of two adjacent source scan lines to be
used in the development of a new, artificial scan line.  These values
are typically expressed as 8-bit numbers.  Weight table 2 is a part
of RAM memory set aside for this purpose.  The amount of memory
required is a function of the number of output scan lines desired.
Using 8-bit values, it is possible to create up to 256 different
artificial scan lines from any two real lines.

      These functions of control section 1 may alternately be handled
by the main processor, if it is determined that there is sufficient
processor bandwidth to allow the acceptance of this task.

      Control section 1 also manages the input and output timing
signals, the horizontal and vertical synchronization signals, the
appropriate frame memory write control signals, and pixel clocking.
Any required horizontal adjustments are performed by modifying the
pixel read clocking.

      Field buffer 4 retains the current field of image data, being
written under the control of th...