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Transition Records for Tracing Program Flows on Amazon and POWERPC Machines Disclosure Number: IPCOM000119107D
Original Publication Date: 1997-Nov-01
Included in the Prior Art Database: 2005-Apr-01
Document File: 2 page(s) / 55K

Publishing Venue


Related People

Smolders, LR


Disclosed is a method to deal with program flow discontinuities when using Amazon* or POWERPC* branch trace exception mechanism. This disclosure is a modified version of [*]. The technique described in (*) does not work on the Amazon family of processors because they do not reset the Machine State Register bits controlling the Performance Monitor after a synchronous exception as the execution of a system call or a page fault. Since the controlling bits do not get reset, the hardware monitor continues to count; and there is no clear transition between user and kernel flow of execution, which means that the "in-transition" as described in (*) will not work.