Browse Prior Art Database

Hardware Implemented Control Store Bug Injector

IP.com Disclosure Number: IPCOM000122557D
Original Publication Date: 1991-Dec-01
Included in the Prior Art Database: 2005-Apr-04
Document File: 3 page(s) / 87K

Publishing Venue

IBM

Related People

Bockhop, BW: AUTHOR [+4]

Abstract

A device that transfers data from a personal computer to onboard processor memory is disclosed. This device controls the data transfer, tristates the processor when data transfers occur, and tristates its self when the processor is in a normal operation state. This device expands the personal computer's data bus to match that of the processor.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 53% of the total text.

Hardware Implemented Control Store Bug Injector

      A device that transfers data from a personal computer to
onboard processor memory is disclosed.  This device controls the data
transfer, tristates the processor when data transfers occur, and
tristates its self when the processor is in a normal operation state.
This device expands the personal computer's data bus to match that of
the processor.

      Designed for use in testing error checking and correction
logic, the Hardware Implemented Bug Injector (HIBI) allows us to
directly access the control store modules on the high-end processor
card by connecting an 80-bit data bus directly to the data pins of
the control store modules on the processor card.  When the PS/2*
accesses control store, the HIBI isolates the control store modules
from the processor.  When the PS/2 finishes its access, the HIBI
reconnects the processor to control store and isolates the PS/2 from
control store.

      When the PS/2 has control of the control store modules, the
HIBI causes the processor drivers to be tri-stated by asserting the
driver inhibit lines on the processor.  When control returns to the
processor, the HIBI tristates itself and re-enables the processor
drivers.

      The figure depicts the high-level data flow of the HIBI.  It
uses a PS/2 connected to a data bus expanding device that allows five
PS/2 cycles worth of 16-bit data to be converted to one cycle worth
of 80-bit data and vice versa.  This system consists of a data bus
expansion device, a controlling state machine protocol, an interface
to the MICRO CHANNEL* of the PS/2, and a suite of high-level
language- controlling programs.

      During a read operation, the HIBI reads 80 bits of control
store data and feeds it to the PS/2 in five 16-bit packets.  During a
write operation, this device feeds five packets of 16-bit data to the
data expanding device, then clocks the resulting 80 bits of data into
the control store modules.

      The following ...