Browse Prior Art Database

Method for facilitating hardware debug of an LSSD chip

IP.com Disclosure Number: IPCOM000123155D
Original Publication Date: 1998-Jun-01
Included in the Prior Art Database: 2005-Apr-04
Document File: 1 page(s) / 61K

Publishing Venue

IBM

Related People

Authors:
Greenfield, JD Clayton, ST Snyder, GJ

Abstract

Disclosed is a methodology to assist in bringup and debug of an LSSD chip. It requires no extra chip design effort or additional logic. The implementation uses a minimal amount of card logic and system software to examine the state of every latch in the chip at the time of failure.