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Emitter Coupled Logic Driver With Output High Voltage Disclosure Number: IPCOM000124741D
Original Publication Date: 2005-May-05
Included in the Prior Art Database: 2005-May-05
Document File: 2 page(s) / 62K

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Achieving high VOH in PECL and ECL drivers has not been easy to accomplish with the conventional technology. A method of achieving this in SiGe technology is presented here by using resistors in conjunction with Emitter followers

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Emitter Coupled Logic Driver With Output High Voltage

The emitter follower output stages required for positive emitter coupled logic (PECL) and emitter coupled logic (ECL) drivers have a tendency to oscillate in the Silicon-Germanium (SiGe) technology. To reduce this tendency to oscillate, it is desirable to insert a series resistor between the emitter follower and the output pad. The DC drop across this resistor makes it difficult to meet the output high voltage (VOH) specification.

     With the use of PFETS to drive the base of the output emitter followers, a higher internal voltage is obtained. This allows a series resistor to be added between the emitter follower and the output pad to reduce the tendency to oscillate while maintaining VOH. When the output is in the low state, the PFET is off and the low level is determined by a resistor and a current source.

     The inputs are level shifted by transistors Q9, Q10,Q11,Q12 which drive the buffer formed by transistors Q1 - Q2 and resistors R5,R6,R7,R8,R9,R10. R9 and Q1 drive P7 while R10 and Q2 drive P8 such that when the base of the output emitter follower is supposed to be high, PFET P8 is ON and when the base of output device Q37 is supposed to be HIGH, PFET P7 is ON. The PFETS P8 and P7 supply the current to the bases of the output emitter follower, providing a less voltage drop in their drain to source voltage (VDS) than the base currents of Q36 and Q37 through resistors R26 and R27. This allows resistors R31 and R...