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Dynamic Address Enabling for RAM Sub-Threshold Leakage Reduction During Active and Idle Modes

IP.com Disclosure Number: IPCOM000128957D
Publication Date: 2005-Sep-22

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method that uses a two-input MUX, a two-input NOR gate, and access-enabled logic to create dynamic address enabling. Benefits include reducing RAM leakage current for both active and idle modes.