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Reducing Power Consumption of System on Chip ICs by Using an Automated Self-Triggered Shutdown of Idle Functional Blocks

IP.com Disclosure Number: IPCOM000133371D
Publication Date: 2006-Jan-25

Publishing Venue

The IP.com Prior Art Database


Disclosed is a method that uses a clock gating design to provide dynamic switching between the active and standby states of the unused and idle logic blocks. Benefits include reducing overall power consumption.