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Disclosed is a method for thermal vias and a thin heat spreader for low-density interconnect (LDI) packages with space constraints. Benefits include improved functionality and improved performance.
English (United States)
This text was extracted from a Microsoft Word document.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately
56% of the total text.
Method for thermal vias and a thin heat spreader
for LDI packages with space constraints
Disclosed is a method for thermal
vias and a thin heat spreader for low-density interconnect (LDI) packages with
space constraints. Benefits include improved functionality and improved
Packages with space constraints have no room for a conventional
integrated heat spreader (IHS). Additionally, high heatsink loads on small
packages can cause solder-joint reliability (SJR) issues at second-level
interconnects. SJR failure causes device failure.
Conventionally, IHSs are attached on top of a flip chip to
increase thermal performance. For a bare package, thermal and signal-transmission
vias connect to the second-level interconnect to increase heat conduction away
from the package (see Figure 1).
The disclosed method combines the effects of thermal vias within
the footprint of a package with a thin heat spreader attached to the back of
the printed circuit board (PCB).
The key elements of
the disclosed method include:
• Thermal vias in the PCB
• Thin heat spreader
• Electrically insulating adhesive thermal
interface material (TIM)
The disclosed method
provides advantages, including:
• Improved functionality due to reducing
the requirement for PCB surface area
functionality due to enabling the attachment of a thin heat spreader to further improve cooling
• Improved performance
due to uniformly spreading heat from the
thermal vias in the plane of the heat spreader
• Improved performance
due to providing a larger surface area
for heat dissipation...