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Write Buffer with Compressed Qualifier Fields

IP.com Disclosure Number: IPCOM000172796D
Publication Date: 2008-Jul-15

Publishing Venue

The IP.com Prior Art Database

Abstract

In modern cache design with memory management unit (MMU), translation is being done on core buses. Memory system is usually using deep write buffers in order to eliminate core pipeline interference and reduce write miss performance impact. MMU translation attributes such as physical address, cache policy and many more need therefore to be saved in the system write buffers for later use in accessing memory. This publication propose an efficient way to reduce area overhead of MMU translation attributes stored inside the system write buffers.