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Fast Access to On-Chip Debug Port

IP.com Disclosure Number: IPCOM000172939D
Publication Date: 2008-Jul-21

Publishing Venue

The IP.com Prior Art Database

Abstract

Method and apparatus for controlling debug interface pins (such as JTAG) by using a dedicated on-chip or on-board register and direct memory access interface implemented by this chip For implementing of this apparatus, a memory mapped register should be introduced either on chip or on board. To control JTAG pins this register is accessed by producing a memory transaction. This memory transaction is initiated by fast direct memory interface. Program download and filling date memory is done with no JTAG interface involving the fast interface is able to access memory directly