Test generation for utilization of simulation resources
Original Publication Date: 2009-Jun-02
Included in the Prior Art Database: 2009-Jun-02
The core idea presented in this article, directed at the use of software simulators in hardward verification, is to add information in the test generator that allows it to guess how much 'work' is distributed on each agent and to level it so that the simulation cycles are used effectively.
In the domain of hardware verification, software simulators are used to simulate the design before it becomes real hardware in order to verify its correctness, to avoid costly re-fabrications. One problem in this process is that software simulators are slow, and thus they become the bottleneck of the verification process.
In the case that the hardware being simulated is a system with multiple agents, simulation stops when every agent finishes performing its tasks. This can cause many cycles to be wasted on idle agents.
Currently this problem is not dealt with, and these cycles usually go to waste.
verification engineers hope that random distribution will solve this problem. The core idea of this invention is to add information in the test generator that allows it to guess how much '
is distributed on each agent and to level it so that the simulation cycles are used effectively. This will be done in a similar non-mandatory way, like testing-knowledge is done in today's test generators.
The advantage to this is clear: better utilization of scarce simulation resources.
The major obstacle to implementing this idea is where to get information about the time required to simulate a specific transaction/command. This can be done by collecting statistics about commands from different simulations.
is to use a performance simulator to assess the various choices and their performance costs.
If the test generator...