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Methodology and Framework for Run-time Coverage Measurement of Architectural Events of a Microprocessor Disclosure Number: IPCOM000201552D
Publication Date: 2010-Nov-15
Document File: 4 page(s) / 422K

Publishing Venue

The Prior Art Database


Microprocessors are being built with a number of functional units. The state space of the processor architecture is huge given the range of input values in FP Units, Vector units, the interaction between various units, the combination of events of various units, etc. This huge state space necessitates extensive testing while ensuring the maximal coverage in minimal time. The coverage statistics is complex and is not apparent from the testcase. Coverage in simulation models/testcase generators creates enormous overhead in execution time and redundancy. This invention proposes a novel way of measuring coverage of architectural events through real-time execution of instruction on hardware. This can be used to assess the coverage of events of any given stream of instructions.

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Page 01 of 4

Methodology and Framework for Run -time Coverage Measurement of Architectural Events of a Microprocessor

Components of the Coverage Measurement System:
1.Coverage Analyzer/Control Program:
2. Testcase
3. Data Specification

The architectural events are defined clearly and data structures used to record/keep track of the events are established in the Coverage Analyzer. The data structures are populated with initial values. The testcase i.e., instruction stream, and the data specifications are fed to the Coverage Analyzer. The Data specification refers to the data to be used for loads and stores and initial register values. The data to be used for loads are presented in a shared memory segment and the stores can also be written to the shared memory segment.

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Figure 1

The Coverage analyzer forks a testcase and the initial register values are set from the data specification and single-stepping is enabled.


Page 02 of 4

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Figure 2

The testcase being analysed now enters Coverage Measurement mode after every instruction execution. After every instruction execution, architecture state snapshot is taken and checks for events are carried out and data structures modified.

Steps in the execution:

1. Pre-execution Steps:

The Coverage analyzer
i. forks the testcase
ii. imparts the testcase context (initialization of register values from the data specification file) and

2. Execute instruction
3. Enter Coverage mode
4. Analyse architectural state
i. Update Data structures


Page 03 of 4

ii. Store Maskable Values and clear...