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System and Method for Fast Implementation of Crossbar Module Disclosure Number: IPCOM000202019D
Publication Date: 2010-Dec-01
Document File: 8 page(s) / 116K

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The Prior Art Database


This invention is a system and method to design a crossbar module for fast physical implementation in an integrated circuit. The system and method in this invention includes the following features and advantages: (1) The system and method in this invention provides a library with multiple well designed basic elements, after a user enters parameter, crossbar architecture with preferred structure and partition is determined according to the technology it uses and its dimension, including die size and preferred pipeline levels etc. (2) The system and method in this invention also provides gate-level netlist assembled and implemented by above basic elements so that it’s configurable and flexible for front-end engineers to use, also can be easily instantiated and integrated into current design; (3) The system and method in this invention also provides equivalent RTL codes, so that the function of the crossbar module can be verified in front-end; (4) The system and method in this invention also provides gate-level netlist with regular naming convention, and the functional information is kept with continuity from front-end to back-end, so that the back-end designers can recognize the specific switches and perform manual optimization; (5) The system and method in this invention also provides physical implementation documents, with which the back-end engineers can start their work from an initiated beginning with good qualities, so that the turn around time is reduced;

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System and Method for Fast Implementation of Crossbar Module

Crossbar module is used for digital system to provide communication between sources of data and sinks of data, at any given time, a data source may establish a connection to a data sink for data transmission. In present, it is very common place for crossbar module to be implemented in integrated circuits for communication devices , parallel computer applications etc .

Now referring to figure 1, it's a high level flowchart according to the traditional process .


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RTL Development & Synthesis

Netlist & Design Spec.

     103 Placement & Route

       104 "Reverse Engeneering"

Physical Refine

Timing & Physical Result



Timing & Physical Closure

Figure 1

In step 101, the font-end integrated circuit engineers develops the RTL codes according to product specification, synthesize it with


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synthesis tool like design compiler etc. In step 102 the netlist and related specifications are delivered to the back-end integrated engineers. In step 103 the back-end integrated engineers perform physical implementation including placement androuting till physical and timing closure. In step 104, "Reverse Engineering" is required in traditional process if current designis physically unworkable, which means the back-end engineers analyze the netlist and request changes to the design structure, like partition and hierarchy, and feedback to front-end engineers and repeat above process .

The traditional process suffers from the drawback as below :
(1) In traditional process, the font-end integrated circuit engineers with ordinary skills often don't consider too much about the physical implementation of a design, when developing the RTL codes, it's very common that numerous copies of simple sentences like "if else" or "case" are used, unfortunately, compilers like DC can't deal with this structure very well in default and are often too optimistic estimating timing condition, as they are not aware of routing condition while the routing utilization takes leading roles in crossbar module physical implementations, therefore it often takes more time and more iterations to perform manual physical and timing optimization in back-end flow;
(2) In traditional process, the integrated circuit engineers usually estimate the die size and utilization in early phase of a design according to general practices and experiences, unfortunately it doesn't apply to crossbar module since it requires more routing resources and lower area utilization than general modules; If too pessimistic, it causes larger die size and low utilization, and costs increases; If too optimistic, it causes more time and iterations to perform physical implementationsin back -end flow;
(3) In traditional process, manual optimization and iterations for physical refines during physical implementation are usually required for crossbar modules especially for those with large number of sources and sinks , as...