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Rework Process for Stacked Modules

IP.com Disclosure Number: IPCOM000208103D
Publication Date: 2011-Jun-23
Document File: 2 page(s) / 63K

Publishing Venue

The IP.com Prior Art Database


As 3D stacked chip technology becomes a viable option for electronic packaging, the rework process becomes critical due to high cost of manufacturing. Described is a method to rework 3D stacked chips. This requires reworking single chip at a given moment.

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Chip modules are beginning to use 3D stacked chip designs in an effort to get more computing power while using less area on the PCB card. A problem that has emerged from the 3D chip architecture is that there is currently not a viable rework process. Without a viable rework process, entire chip stacks are scrapped if only one chip in the entire stack is bad, which greatly reduces process yields.

    Described is a solder rework process for 3D stacked chip modules. This process allows a stacked chip module that was found to have one or more defective chips to be reworked to allow for the utilization of the good chips. The following flow chart (shown in Figure 1) describes the process for separating the bad chip from the stack.

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    Figure 2 illustrates the devices used in the process flow when a lateral heat distributor layer between chips is used.


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Figure 3 illustrates the devices used in the process flow when hot air inlets are used.

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    After the bad chip is removed from the stack, a new chip is prepared with solder balls on the appropriate surface and the chip stack is reassembled with the good chip and reflowed.