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Method For Protecting BGA and Die Connection System In A Physical Secure Environment Disclosure Number: IPCOM000217969D
Publication Date: 2012-May-14
Document File: 4 page(s) / 92K

Publishing Venue

The Prior Art Database


A solution for securing/protecting chip/package's BGA connections to substrate/rawcard from potential probing. Current solutions based on enclosures are challenging from a manufacturing and thermal dissipation point of view and typically very expensive. Placing sensitive components in a "protected cavity" of the chip susbtrate or raw card prevents physical access to the BGA or Die connections of a component. The surface of the walls of the "protected cavity" are shielded using security matrix.

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Page 01 of 4

Method For Protecting BGA and Die Connection System In A Physical Secure Environment

The following presents a brief description of the method for protecting BGA and die connections system in a physical secure environment. One of the security risks in a chips package or component mount is the access to die or BGA connections that allow probing of signals. Our

proposed method increases the security of a chips package by hiding the die or BGA connections on a cavity in the Chip's substrate or raw card therefore not allowing probing of signals.

This method can increase the security of the physical secure environment used in the "Method to implement a multi-component secure package without the need for a physical enclosure" (No- Cap secure envelope, reference 1). Components to be included in the No-Cap secure envelope need to be repackaged by redesigning the chips substrate, therefore bringing the secure envelope directly to the chips die. Figure 1 shows the chip repackage.


           Epoxy Underfill Mold Cap

Original Chip



Chip substrate

Addon substrate layers (build-up layer)

Modified packaged w/ added layers


Original substrate layout can be preserved (reduce development/qualification risks)!!

Figure 1. Chip Repackage


Page 02 of 4

One of the security risks in this type of chip package is the open access to die and BGA connections that allow probing of signals. Figure 2 shows the Chips repackage with normal die connections. Since these die connections are so small, they are secure enough for typical secure envelopes.

Mold Cap

Epoxy Underfill

Original Chi...