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Disclosed is a method to make it easier to hit wafer test pads. The solution is to place an electrically testable probing target in or adjacent to the pad set.
English (United States)
This text was extracted from a PDF file.
This is the abbreviated version, containing approximately
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Page 01 of 2
An Electrically testable Wafer Probing Target for alignment Correction
As wafer test pads become smaller, the difficulty in hitting these pads increases. Typical kerf pads used to be 90uM by 90uM, approximately 8100uM^2. Today, the sizes with which to work are 60uM by 60uM, approximately 3600uM^2, and 40uM by 40uM, approximately 1600uM^2, without the edge seal. A new probe card has 20uM diameter with+-12uM position accuracy when built. This causes bad data, scrap, and rework.
The solution is to place an electrically testable probing target in or adjacent to the pad set. The target is four bars positioned in a pattern simulating the edge of the adjacent normal pad with a substrate in the center of the opening. The four bars positioned in a pattern simulating the outer edge of the adjacent pad are connected to pads near the target. By putting a probe in this target for alignment, using a resistance meter (e.g., Digital Multi-Meter (DMM)), connecting the adjacent probes, and testing the resistance of each combination, it can be determined if the probes are aligned or misaligned to the target. Then, the probe position can be corrected as necessary. This can be repeated until the probe is centered. Alternatively, the process can be stopped and an instituted procedure followed for handling probing errors if no correct position is detected.
Having a substrate dot centered in the target allows the detection of centering.
When centered, the probes can be moved to the norm...