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Embed Dirty Cache Data Storage with the Disk Array Disclosure Number: IPCOM000234547D
Publication Date: 2014-Jan-17
Document File: 2 page(s) / 67K

Publishing Venue

The Prior Art Database


Disclosed a design to embed the dirty cache data storage with the disk array.

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Embed Dirty Cache Data Storage with the Disk Array

High-end storage controllers are equipped with on-adapter cache implemented in DRAM. When the cache is operated under "Write-Back Mode" (instead of Write-Through Mode), there is risk of data loss when dirty cache data exists in the cache DRAM and power failure happens. To prevent the data loss upon power failure, currently solution uses BBU (Battery Backup Unit) to power the DRAM for 72 hours (old design) or uses super capacitor to copy cache data from DRAM to Flash chips (new design).

The problem is: Data are stored at two separate places: 1. the disk array itself (i.e. The set of disk drives) and 2. the on-adapter DRAM or flash chip which contains the dirty cache data. Once the disk array is disconnected from the original storage adapter, it's not obvious which disk array matches which adapter cache data. This may cause risk of data loss if the dirty data are not saved to the array later. E.g. adapter failure, system failure or human operation errors.

Disclosed is a design to store the dirty cache data along with the disk array in a single place. For example, an implementation may choose to embed 512MB or 1GB flash storage into the drive tray or the drive themselves. Upon a power failure, the dirty cache data is copied to the embedded flash storage within the drive tray to keep the data at a single place (with the power supplied by BBU or super capacitor) . On the next power on, the dirty cache data is restore...