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Robust and Efficient Standard Cell Power Connections using Rectangular Vias

IP.com Disclosure Number: IPCOM000235947D
Publication Date: 2014-Mar-31

Publishing Venue

The IP.com Prior Art Database

Abstract

In lower technology nodes (45nm and below), fabs are recommending maximum usage of rectangular vias over square vias. Power grid designers have started using rectangular vias for power stripe connections. In lower technology nodes (mainly 40nm and below) the standard cell power grid is predominantly based on NXT grid architecture that has both M1 and M2 horizontal power rails, with an array of square vias connecting them (for example 28nm ARM libraries). Using rectangular vias in the standard cell power grid puts constraints on standard cell placement. Hence the challenge is to use rectangular vias for standard cell power connection without any overhead. Our proposed power grid structure facilitates the maximum usage of rectangular vias for horizontal M1-M2 power rail connection without any overhead.