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Mechanism to Track Changing Value in Register File to Save Power Disclosure Number: IPCOM000236414D
Publication Date: 2014-Apr-24
Document File: 1 page(s) / 39K

Publishing Venue

The Prior Art Database


Disclosed is a system for the detection of zero low data, tracking of physical registers with this data, and the suppression of the further write of this data. This system saves power in the Vector Register File.

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Mechanism to Track Changing Value in Register File to Save Power

The Vector Register File (VRF) is architecturally four times the size of the previous Floating Point Register file (FPR). In addition, all the old instructions only operate on the high 64 bits of the data. The low 64 bits of data are always written with zeros for the old instructions.

The bigger register file is now creating a large level of power consumption for operations, and half the data is not used. To save power, a method is needed to only

write the upper half. A method is also needed to reduce hardware in an out-of-order execution machine; currently, the physical registers are assigned for both halves with one register tag. There is one mapping for all 128 bits of the register.

The solution is to suppress the writes to the low data when the physical register low data is known to be zero.

The novel system requires a tracking mechanism that keeps a bit for every physical register that states whether the low data is zero. This detection can be done in one of three ways:

• Decode the old architected instructions that write zero to the low half of the VR • Detect the result data for these bits to be equal to zeros
• Detect the input operands that cause special cases that write zeros

Once this tracking table is in place for the physical registers, and the current instruction

wants to store zeros because it has been detected to be one of these three cases, then the system suppresses the write...