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# Using Output Current of a Pin to Indicate the States of Internal Nodes

IP.com Disclosure Number: IPCOM000241035D
Publication Date: 2015-Mar-20
Document File: 3 page(s) / 83K

## Publishing Venue

The IP.com Prior Art Database

## Related People

Osama Alborno: INVENTOR [+2]

## Abstract

Each node to be observed is connected to a MOS switch. A “high” state in the target node would turn off the switch and a “low” state would turn on the switch. (Which state turns on or off the switch is arbitrary.) By measuring the total current injected onto the pin, the user can determine which switches are on or off and therefore the states of the target nodes. For each additional node to be observed, the amount of current used in conjunction is doubled from the previous node. The binary scaling ensures one-to-one mapping, that is, a combination of nodal states produces a unique value of output current. No two combinations of nodal states produce identical output current. The binary scaling scheme is not the only way to achieve one-to-one mapping, but is a simple way to do so.

This text was extracted from a PDF file.
This is the abbreviated version, containing approximately 47% of the total text.

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Using Output Current of a Pin to Indicate the States of Internal Nodes

Using Output Current of a Pin to Indicate the States of Internal Nodes

1. Inventors: James Teng, John Weinerth, and Osama Alborno

2. Synaptics Incorporated, San Jose, CA, USA

3. Short Summary

During power-up, there is a possibility that the internal circuitry of a chip fails to reach the proper power-on-reset (POR) state after all supplies have reached their final values. In this failure condition, the digital section of the chip may not function.

In order to find out the root cause of such a situation, it is helpful to be able to probe internal nodes. However, is it usually not possible to do so without decapping and possibly FIB'ing the chip.

There are two possible solutions:

1. Use a MUX to route the nodes to be observed onto an external pin. This is being implemented.

However, the MUX control signals come from the digital section. When the chip is not powered up correctly, digital section does not function and renders the MUX useless.

2. Add extra pins for the purpose of observing internal nodes. This adds costs in terms of die area and packaging. It is not reasonable to use an external pin for each internal node that one would like to determine the state of.

Neither of those two solutions is practical at this moment.

Figure 1 illustrates the concept of using currents to indicate the states of internal nodes. Nodes A and B control the on/off state of the MOS switches and the total current injected onto the pin. By measuring the currents on the pin, one can tell which switches are on/off and thus the states of nodes to be observed. Therefore, by looking at the output current at a pin, a single pin can indicate the internal status of multiple nodes.

Page: 1 of 3

Information contained in this publication is provided as-is, with no express or implied warranties, including any warranty of merchantability, fitness for any particular purpose, or non-infringement. Synaptics Incorporated assumes no liability whatsoever for any use of the information contained herein, including any liability for intellectual property infringement. This publication conveys no express or implied licenses to any intellectual property rights belonging to Synaptics or any other party. Synaptics may, from time to time and at its sole option, update the information contained herein without notice.

James Teng

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Using Output Current of a Pin to Indicate the States of Internal Nodes

4. Some Problems Solved

Examples of some of the problems addressed by the invention include:

This invention enables a user to observe the state of individual internal state of multiple nodes via a single floating pin during bench testing. Doing so minimizes the effort and cost of debugging.

5. General Description

As shown in Fig. 1, this invention has four parts:

1. Internal nodes to be observed

2. An external floating pin

3. An array of cur...