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Full Exposed Pad Package Design Disclosure Number: IPCOM000245247D
Publication Date: 2016-Feb-22

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The Prior Art Database


In some cases, especially for power devices, a semiconductor package can't meet its thermal requirement for device performance, even though it already has an Exposed Pad (EP) package design because the EP area is not big enough, as shown in Figure 1. We found that there is some room to improve the thermal performance by increasing the EP area, which only requires some lead frame modification. We can turn package bottom side to full EP area, which significantly improves the package thermal dissipation capability.