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Method and Apparatus to Record on Chip High-Speed Clock Frequencies With a Low-Speed Tester Disclosure Number: IPCOM000245450D
Publication Date: 2016-Mar-10
Document File: 2 page(s) / 40K

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Described is a method and apparatus to record on chip high-speed clock frequencies with a low-speed tester.

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Method and Apparatus to Record on Chip High -

-Speed Tester

Speed Tester

Recording high-speed clock frequencies with low-speed tester equipment requires unique circuitry and presents tester challenges. Clock requirements for test circuitry can sometimes be only a series of pulses. Measuring the frequency of these pulses is not possible with the aforementioned low-speed tester equipment. A need exists to record the frequency of these clock pulses so that they can be read out at a slower speed.

    The main idea is to use a counter to record the pulses over a set period of time and then after the set period of time, scan out the value and repeat the procedure, thus giving many data points to look at frequency. The value scanned out would be compared to a table of data created from simulation results, thus giving the circuit designer the frequency of the internal clock pulses.

    The following figure shows how a system is set up to measure high-speed internal clock pulses. The SPD inputs fed into the Clock Speed Controller configure the Clock Generator for a given target frequency. Depending on process, voltage, and temperature, this frequency could be quite different from what is intended. A slow/tester clock is used to trigger the Clock Generator which may be continuous or may be a series of pulses. The Clock Generator passes the slow clock and fast clock to a Glitchless Clock Mux so that switching between clocks does not introduce any error when switching between counter capture mode and scan out mode. A set amount of time to run the counter is determined by spice simulation when creating the simulation data table to compare the against the actual hardware resu...