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Method and Apparatus to improve thermal challenges in 3D-Stacked DRAM Disclosure Number: IPCOM000247790D
Publication Date: 2016-Oct-06
Document File: 4 page(s) / 71K

Publishing Venue

The Prior Art Database


Disclosed method is to avoid and handle hot spots in 3dimensional (3D) stacked memory chips. In order to reduce the scenario wherein the same row is accessed across all the rank at the same time, the Memory Controller diversifies (across physical locations) the accesses by performing a logical XOR operation between the Chip ID and Bank Group bits and, Chip ID and Bank bits. Further, even after performing these XOR operations, if the same row is being accessed in the other ranks, the MC will ensure that the location is as far as possible from the current rank. The first technique tries to avoid the thermal issue in the 3D stack and the second technique handles the thermal issue if it arises even after employing the first. Overall, the method handles the thermal issues with the proposed techniques. It also ensures that the same Through Silicon Via (TSV) is not accessed repeatedly. When the same row is accessed across all the dies, then the TSV in the region also gets used repeatedly leading to a local hot spot vertically. This causes a permanent TSV failure inside the memory stack. Generally, the Spatial and Temporal variability in temperature (i.e., hotspots) is anticipated to result in bit error variation in DRAM dies. The article also takes care of the Hotspot-Induced Bit Error Variation.

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Method and Apparatus to improve thermal challenges in 3D-Stacked DRAM

Background & Problem Statement:

"Region-hammer" is a problem with some recent DRAM devices in which repeatedly accessing a row of memory can cause bit flips in the rows adjacent to it.

It has been demonstrated that, by repeatedly accessing two "aggressor" memory locations within the process's virtual address space, they can cause bit flips in a third, "victim" location. The victim location is potentially inside or outside the virtual address space of the process - it is in a different DRAM row from the aggressor locations, and hence, in a different 4K page (since rows are larger than 4K in modern systems). This issue is being addressed as row hammer, and has not been solved yet. In case of 3D Stack, row hammer can again create a problem along with the thermal issues.

The DRAM arrays are stacked together and typically Bank 0 of all the dies lies in the same region of the vertical stack. The problem statement is that Row 0 of Die 0 (Rank 0) is repeatedly accessed and at the same time in Row 0 of Die 1(Rank
1) is also accessed repeatedly.

For such a case, there are two issues. First, the bit flips happen in the same die, and second, at the same time point of failure become very high since the DRAM gets hotter and a particular ROW will be a hot spot for the entire chip stack
Any hot spots over the period of time tend to create a temperature-induced cell fails. Indirectly this also reduces Bit Error Rate (BER) or leads to variation in BER.

The proposed solution addresses these problems.

Summary of article

The proposed article takes care of the hot spots problem in a 3D Stacked DRAM chip. Any hotspots make the DRAM cell vulnerable. In 3D Stack, possibility of the same ROW being accessed in all ranks or at least neighboring dies is high. In such cases, the hot spot gets created in the chip stack. Row 0 of Bank 0-Rank 0 is being repeatedly accessed and at the same time, when the rank switch happens and Row 0 of Bank 0-Rank 1 is also being repeatedly accessed a hot spot gets created. Already Rank1 will be thermally challenged in the 3D chip stack and on top of that this issue worsens the current condition, the proposed article tackles and isolates the access to avoid the hot spot creation. Memory controller snoops the addresses going to the 3D Stacked DRAM and ensures that the same row is not accessed in all ranks at the same time. Further, even if the same row is being accessed in the other ranks, it will ensure that the location is away from the current rank.

This article provides a way to avoid the thermal issue in 3D stack and even if that


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happens later the disclosure also identifies how to handle the situation with different techniques. This article also ensures that the same TSV is not actually accessed repeatedly, because when the same row is accessed in all dies, then the TSV also gets used repeatedly which creates the local hot spot vertically. Thi...