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A new way to generate buffer library with multiple category buffer input Disclosure Number: IPCOM000250450D
Publication Date: 2017-Jul-18
Document File: 3 page(s) / 79K

Publishing Venue

The Prior Art Database

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A new way to generate buffer library with multiple category buffer inputAbstract Disclosed is a novel buffer library generation method that first prunes the buffer library for each category of buffer, and then merges the categories to form a new type of buffer library random logic macro (RLM) inverter. This builds a more robust buffer library, reduces runtime, and produces a better quality of results. The buffer insertion is very import for the timing disclosure. Figure 1: A simple buffer insertion example

The time complexity is: O(n2), where n is the candidate repeater insertion locations. With multiple choices (denoted as B) of repeaters for each location, complexity becomes O(n2B2). Figure 2: Different type buffer insertion example

The runtime of repeater insertion highly depends on the size the repeater library (B, above). In 14nm, there are tens of repeaters to choose. To reduce runtime, pruning the buffer library is necessary to get the representative buffers. In addition, the well-pruned buffer library would provide the similar quality of results (QoR). The existing buffer library pruning algorithm takes all the buffers as equal input. This works well for random logic macro (RLM) designs because the nets are relatively short and use only traditional inverters.

Figure 3: Existing prior art shows the buffer insert flow

The buffer pruning algorithm is described in prior art*. Here is the algorithm:

1. Select buffers from a general buffer library that meet a criterion 2. Group the selected buffers into a plurality of groups 3. Select a buffer from each group for inclusion in the optimized buffer library.

The reduced size buffer library provides approximately the same performance during buffer insertion. This method works well if the input buffer types are unique. Based on the technology developing, the design has more buffer types (e.g., Integration inverters, integration buffers) than ever due to th...