Reduced DFE and/or DPD complexity, by avoiding processing time domain copies of input signal
Publication Date: 2019-Jan-11
The IP.com Prior Art Database
OFDM technologies use copies of time domain signals. These include but not only: - Cyclic prefix of OFDM symbols, -SS & SSS signals in 4G LTE (& potentially 5G), - 5G Channel Estimation pilots symbols. When signals' copies are found, we can spare the associated DFE processing (for example CFR or DPD). We can even envision an automated scheme that detects if a chunk of data has already been processed and hence spare the associated processing.
Title: Reduced DFE and/or DPD complexity, by avoiding processing time domain copies of input signal Abstract: OFDM technologies use copies of time domain signals. These include but not only: - Cyclic prefix of OFDM symbols - PSS & SSS signals in 4G LTE (& potentially 5G) - 5G Channel Estimation pilots symbols
When signals’ copies are found, we can spare the associated DFE processing (for example CFR or DPD). We can even envision an automated scheme that detects if a chunk of data has already been processed and hence spare the associated processing. Detailed description: DFE system are typically treating the incoming carriers as a stream of IQ samples, and unfortunately seldom exploiting the underlying waveforms structures to improve the efficiency of the DFE system processing. In the present document, we propose a scheme that allows using such underlying characteristics to save precious DFE and/or DPD processing resources when identifying such situations. The situations where such DFE and/or DPD processing can be spared are: - Cyclic prefixes copies of OFDM symbols - PSS & SSS signals (example: LTE Rel-14 Sidelink) - 5G Channel Estimation pilots
The reasoning is that DFE functions such as DUC, CFR or DPD can be modelled as a finite polynomial development and/or FIR filters. Thus, these processing blocks have a finite memory depth requirement. The core idea is that if we feed the DFE and/or DPD processing cores with the same data streams twice, the same outputs will come out identical (provided that the filters coefficients have not changed in the meantime). The proposed solution reduces the average processing requirement, whether it is based on DSP, VSPA, FPGA, ASIC or any other HW logic. The amount of HW computational savings are directly proportional to the amount of copies found in the composite signal reaching DPD and/or DFE processing. Here are the typical cores loading reductions achievable.
7% in case of LTE 4G Downlink signal – only due to the CP properties 23.5% for LTE 4G Sidelink synchronization subframe 14% for 5G pilots symbols
The essential point of the invention is that DFE processing (DUC, CFR, DPD actuator) can be seen as function based on a finite memory depth (let’s say 64 history samples from the past for example).
If such processing is run twice on the same data, it will produce the same data twice! We can spare this processing, by tracking the underlying waveform such as counting the symbols boundaries. Such saving will result in less DSP or VSPA cores utilization, which translates into less power consumption.
1. Application 1: OFDM Cyclic Prefixes This application is described first because it is the easier to grasp, and the one that might provide the more gains. Cyclic Prefixes are used in OFDM to fight ISI (inter symbol interferences). A CP is simply a copy of the last chunk, put at the beginning of the symbol. Example for a LTE10 carrier @ 15.36 MSPS :
The duration of the CP in LTE is proportional to the sa...