Month of December 2004 - Page Number 8

Showing 71 - 80 of 414 from December 2004
Browse Prior Art Database
  1. 71.
    Disclosed is a method that suppresses noise for both register files and generic domino muxes. Benefits include a low impact on timing.
    IPCOM000033790D | 2004-Dec-28
  2. 72.
    Disclosed is a method for a circuit that enables or disables the clock on the falling edge instead of the rising edge. Benefits include adding a phase of margin and preventing gate leakage.
    IPCOM000033789D | 2004-Dec-28
  3. 73.
    Disclosed is a method for eliminating unnecessary frequency transitions while maintaining functionality. The disclosed method may be used in conjunction with temperature sensing, voltage droop sensing, or any other applications where the frequency is dynamically changed with respect to an on-die measurement.
    IPCOM000033788D | 2004-Dec-28
  4. 74.
    Disclosed is a method for predicting the timing impact to an interface due to the non-ideal powers and grounds in an actual system. Benefits include reducing signal integrity risks on platforms.
    IPCOM000033787D | 2004-Dec-28
  5. 75.
    Disclosed is a method that optimizes the cross-clock domain timing paths and the routability of the design, using sets of command codes in the Synopsys constraint file.
    IPCOM000033786D | 2004-Dec-28
  6. 76.
    Disclosed is a method for modeling the metal grid interconnect on silicon fabricated components. The disclosed method provides an electrical representation for simultaneous switching output (SSO) simulations for multiple IO signal path modeling.
    IPCOM000033785D | 2004-Dec-28
  7. 77.
    Disclosed is a method that enables VLSI design circuits with full scan designs to operate contention-free during scan testing, thereby making them automatic test generation program (ATPG) and Logic-BIST friendly. Benefits include improving and simplifying testing.
    IPCOM000033784D | 2004-Dec-28
  8. 78.
    Disclosed is a method that computes pin-to-pin resistance between pin pairs, making sure parasitic extraction, timing, and noise are accurate, and that other applications receive the resistance information.
    IPCOM000033783D | 2004-Dec-28
  9. 79.
    Disclosed is a method to improve SRAM cell read stability without increasing the cell area or requiring a negative supply voltage. Benefits include maintaining device reliability limits.
    IPCOM000033782D | 2004-Dec-28
  10. 80.
    Dual cooling methods, one active, one passive, are employed to maintain the operating temperature of a hard disk unit. This arrangement is particularly applicable to Personal Video Recorders (PVRs)/Digital Video Recorders (DVRs)
    IPCOM000033781D | Original Publication Date: 2004-Dec-28