Month of August 2005 - Page Number 4

Showing 31 - 40 of 404 from August 2005
Browse Prior Art Database
  1. 31.
    Disclosed is a method for dual computations in a single pipeline for soft error rate (SER) protection. Benefits include improved functionality and improved power performance.
    IPCOM000127441D | 2005-Aug-30
  2. 32.
    IPCOM000127440D | 2005-Aug-30
  3. 33.
    Disclosed is a method for computer address matrix (CAM) array self-checking protection. Benefits include improved functionality and improved reliability
    IPCOM000127439D | 2005-Aug-30
  4. 34.
    Disclosed is a method for reducing aliasing in software performance measurements. Benefits include improved functionality and improved performance.
    IPCOM000127438D | 2005-Aug-30
  5. 35.
    Disclosed is a method for performing Direct Memory Access (DMA) operations without affecting the CPU’s bus access. Benefits include improved CPU availability for applications and improved overall system performance.
    IPCOM000127437D | 2005-Aug-30
  6. 36.
    Disclosed is a method for a recovery and synchronization mechanism for loop prediction using a branch count table (BCT). Benefits include improved functionality and improved performance.
    IPCOM000127435D | 2005-Aug-30
  7. 37.
    A circuit or audio system that responds and compensates for ambient noise, by automatically controlling the volume output. Example: increases or adjusts the audio level of a car radio/stereo as noise from the road or engine becomes louder.
    IPCOM000127430D | 2005-Aug-30
  8. 38.
    Disclosed is a method for a programmable delay flip-flop network. Benefits include improved functionality, improved power performance, improved yield, and an improved development environment.
    IPCOM000127434D | 2005-Aug-30
  9. 39.
    Disclosed is a method for an on-chip multicycle static bus with a progressive time-borrowing window. Benefits include improved functionality and improved performance.
    IPCOM000127433D | 2005-Aug-30
  10. 40.
    Disclosed is a method for temperature-dependent deactivation of parallel low-voltage circuits. Benefits include improved functionality and improved power performance.
    IPCOM000127432D | 2005-Aug-30