Month of December 2005 - Page Number 15

Showing 141 - 150 of 352 from December 2005
Browse Prior Art Database
  1. 141.
    Disclosed is a method within a Peripheral Component Interconnect-to-Peripheral Component Interconnect bridge to enable starvation-free handling cycles as delayed transactions (DT) from multiple PCI masters. Benefits include a cost effective design.
    IPCOM000132466D | 2005-Dec-17
  2. 142.
    Disclosed is a method that integrates desktop and mobile PCI arbiters into a single state machine, and uses a single fixed arbitration point instead of dynamic arbitration points. Benefits include a solution that has fewer boundary conditions and consumes fewer gates.
    IPCOM000132465D | 2005-Dec-17
  3. 143.
    We propose an improved system that integrates a method to determine the most efficient sampling frequencies with a process control and monitoring system. This includes providing a method for assessing the effectiveness of the current sampling frequency to detect changes in the process. It also includes a method to...
    IPCOM000132464D | 2005-Dec-17
  4. 144.
    Disclosed is a method that uses a faster half pixel accuracy block matching algorithm to accelerate the motion estimation (ME) process when employing the new WMMX2 instructions WAVG4 and WMERGE. Benefits include improving code size and performance.
    IPCOM000132463D | 2005-Dec-17
  5. 145.
    Disclosed is a method that uses a graphical cue for the user to locate the next possible letter when typing on a soft keyboard interface. The cue is based on existing predictive technology to recommend the next series of letters by highlighting them.
    IPCOM000132462D | 2005-Dec-17
  6. 146.
    Disclosed is a method for a BIOS redirection function that uses a 32-bit register to program the BIOS with a “CPU Only Reset” vector, once system initialization is complete. Benefits include resuming operation in a standard way across processor families and platforms.
    IPCOM000132461D | 2005-Dec-17
  7. 147.
    Disclosed is a method for a non-symmetrical comparator/sampler circuit structure that introduces a PVT insensitive and well-controlled comparison threshold voltage in the comparator and sampler circuits. Benefits include a solution that uses a smaller area, consumes less power, and is suitable for very high frequency...
    IPCOM000132460D | 2005-Dec-17
  8. 148.
    Disclosed is a method that allows the PCI Express Backbone (SPXB) to support multiple data bandwidths at the same time. This minimizes the effort required for SPXB systems to enable the 2x data bandwidth capability.
    IPCOM000132459D | 2005-Dec-16
  9. 149.
    Disclosed is a method for a multi-core memory, where the DRAM is segmented into several separate memories on the same die. Benefits include increased access speed and memory bandwidth.
    IPCOM000132458D | 2005-Dec-16
  10. 150.
    Disclosed is a method for a dual-mode output driver circuit with reduced parasitic capacitance. Benefits include improved functionality and improved performance.
    IPCOM000132457D | 2005-Dec-16