Month of December 2005 - Page Number 3

Showing 21 - 30 of 352 from December 2005
Browse Prior Art Database
  1. 21.
    Disclosed is a method for a-dual mode scroll bar for mobile devices. Benefits include improved functionality and improved performance.
    IPCOM000132633D | 2005-Dec-28
  2. 22.
    Disclosed is a method for a keyboard with keys that are oriented at a 45-degree angle. Benefits include improved functionality and improved usability
    IPCOM000132632D | 2005-Dec-28
  3. 23.
    Disclosed is a method that reduces power consumption by not requiring the primary display to be the only means to report the status of a process.
    IPCOM000132631D | 2005-Dec-28
  4. 24.
    Mixed signal design such as ASIC includes decoupling capacitors in various locations of design to minimize effect of noise in circuit performance. However, adding these decoupling capacitors do impact the global resonance in addition to local resonance. In todays design environment that many clock frequency...
    IPCOM000132630D | Original Publication Date: 2005-Dec-28
  5. 25.
    In the design and manufacturing of Application Specific Integrated Circuilts (ASIC) reuse of Intellectual Property (IP) is a known art and provides a lower cost and higher quality ASIC. However, the initial design of IP sometimes requires a real implementation on an Integrated Circuit. With increasing...
    IPCOM000132629D | Original Publication Date: 2005-Dec-28
  6. 26.
    An automated method for generating partial-good embedded memories is proposed. The new method enables parallel module-level (or post-fuse) BIST testing of multiple embedded memory instances on the SoC/ASIC die, where each memory instance can be of a unique size and all can possess different partial-good solutions.
    IPCOM000132628D | Original Publication Date: 2005-Dec-28
  7. 27.
    Semiconductors memories are designed to meet design specifications even at worst process, voltage, and temperature corners. This implies that if the chip lands in a fast process corner, its design performance will far exceed the design specifications, unnecessarily operating at higher speed then required. This...
    IPCOM000132627D | Original Publication Date: 2005-Dec-28
  8. 28.
    A method is provided to hard code a Bist In Self Test (BIST) signature for a Read Only Memory (ROM) during manufacturing test. Said programming is done via the same software that is used to assemble the ROM and uses the same manufacturing levels that are used to prgram the ROM memory personalization.
    IPCOM000132626D | Original Publication Date: 2005-Dec-28
  9. 29.
    Disclosed is a method for a dynamic burst length for double data rate (DDR) memory. Benefits include improved functionality and improved performance.
    IPCOM000132625D | 2005-Dec-27
  10. 30.
    Disclosed is a mechanism for implementing a watch-dog logic (WDL) in memory controllers for collateral memory access monitoring and control. Benefits include improved functionality and improved performance.
    IPCOM000132624D | 2005-Dec-27