Month of July 2006 - Page Number 4

Showing 31 - 40 of 431 from July 2006
Browse Prior Art Database
  1. 31.
    IPCOM000138638D | 2006-Jul-28
  2. 32.
    IPCOM000138637D | Original Publication Date: 2006-Jul-28
  3. 33.
    This invention is about "Read Once Memory"device .This memory can be read valid data only for once. The definition "Once " in this invention is to be able to retrieve valid data only first power on of this device. So until first power off, it can accept any number of READ commands and valid data is readable.
    IPCOM000138631D | Original Publication Date: 2006-Jul-28
  4. 34.
    Disclosed is a structure that reduces the single event upset (SEU) rate of circuits on a hybrid orientation technology (HOT) wafer, and a method for fabricating this structure. The structure comprises a heavily doped layer under the devices in the epi layer.
    IPCOM000138630D | Original Publication Date: 2006-Jul-27
  5. 35.
    Use of a single shared recovery space across transactions can help address scaling concerns by dramatically reducing the quantity of disk writes required in order to track and manage the starting recovery points within an underlying journal for each such transaction.
    IPCOM000138629D | Original Publication Date: 2006-Jul-27
  6. 36.
    A system to enforce client side cache consistency with multiple-server cluster cache repositories in transactional context is described. Smart and automatic and fault-tolerant routing mechanisms for applications to use client cache transparently without knowing the locations of cache repositories are presented.
    IPCOM000138628D | Original Publication Date: 2006-Jul-27
  7. 37.
    This invention provides a decoupling capacitor structure that can be configured to operate either at high voltage, without concern of overvoltage on the oxide, or at low voltage, without wasted capacitance per unit area.
    IPCOM000138627D | Original Publication Date: 2006-Jul-27
  8. 38.
    IPCOM000138626D | 2006-Jul-27
  9. 39.
    Inter-strata (each strata referring to either a die or wafer) connections in a three-dimensional (3D) chip result in efficient interconnection among circuitry from different strata. 3D integration without any dedicated input-output (I/O) circuitry at the inter-strata connections may be an appropriate design strategy...
    IPCOM000138625D | 2006-Jul-27
  10. 40.
    A downhole drilling motor (1), comprising: a) a stator (2) having a first plurality of helical lobes (3); and b) a rotor (4) having a second plurality of helical lobes (5), said rotor being rotationally disposed within said stator wherein the stator (2)has an outer coating (6) or is composed of a material having...
    IPCOM000138623D | 2006-Jul-27